1. Field of the Invention
The present invention relates, in general, to a counter circuit, and in particular, to a nonvolatile counter circuit which stores information without loss even if power is cut off.
2. Description of the Prior Art
Nonvolatile counter circuits utilizing nonvolatile insulated gate type field effect memory transistors, such as MNOS (Metal-Nitride-Oxide-Semiconductor), as elemements of flip-flops which constitute each bit of a binary counter have been proposed in the past. Representative circuits of this type are disclosed in the Oct. 23, 1972 issue of "Electronics", pp. 119-123 under the title "Metal-Nitride-Oxide IC Memory Retains Data for Meter Reader".
As is well known in the art, the MNOS transistor has a dual gate structure consisting of a metal layer, a Si.sub.3 N.sub.4 layer and a SiO.sub.2 layer.
Carriers are injected from the substrate into traps which exist in the vicinity of the boundary of the Si.sub.3 N.sub.4 layer and the SiO.sub.2 layer by the tunneling phenomenon. The storage of injected carriers in traps is utilized for nonvolatile information storage. Binary values "1" and "0" are stored as values of threshold voltage of the transistor. More specifically, the nonvolatile counter circuits have such a configuration that the MNOS transistor is interposed between a load MOS transistor and a switching MOS transistor of a flip-flop circuit. The information stored in the MNOS transistors is erased at every count input and new information from the flip-flop is written into the MNOS transistors. Thus, it is possible to store information in the counter even if the power supply is cut off. However, the information stored in the MNOS transistors is rewritten at every count input, so the MNOS transistors are apt to gradually deteriorate. That is, the difference in the threshold voltages corresponding to each binary value becomes extremely small after 10.sup.10 rewriting operations. Further, deterioration appears in the memory holding characteristics of the device. This deterioration is understood to be based on the appearance of a high density surface level in the vicinity of the boundary between the thin oxide layer and the substrate of the MNOS transistor. These deteriorations are rather essential and can not be avoided with the present technology. These deteriorations can also be observed when the writing voltage is applied to the gate of the MNOS transistor for a long time, for example 10.sup.4 sec, even through the frequency of re-writing is small.
A second defect of known counter circuits lies in the low operating frequency of the counter. This is due to the fact that several tens to several hundreds of microseconds are required to write information into the MNOS transistor. Thus, the maximum operating frequency of the counter circuit is only on the order of several kHz.